1. Field of the Invention
The present invention relates generally to semiconductor integrated circuits, and more specifically to techniques for forming conductive interconnection on such devices.
2. Description of the Prior Art
Local interconnect has been used to achieve improved packing density in sub-micron integrated circuit designs. Local interconnect is an extra level of interconnect used for connecting closely spaced elements in a layout design. Local interconnect typically does not cross over any portion of other interconnect layers, although it may cross over field oxide regions.
Numerous techniques have been used to implement local interconnect. These techniques typically introduce new processing technologies above and beyond those used for the remainder of the device fabrication process flow. Such techniques include, for example, the use of titanium nitride or refractory metals for the local interconnect. Selective deposition of refractory metals on silicon has also been proposed for local interconnect. The quality of the conducting element formed using such techniques varies, with some techniques resulting in fairly good conductors. However, such techniques typically introduce additional process complexity to the normal process flow. This additional complexity tends to decrease device yield and increase cost.
It is desirable to use local interconnect in integrated circuit design, because of the layout area savings. It would be desirable to provide a local interconnect fabrication technique which does not introduce additional process complexities.